Qualcomm Hexagon


Hexagon QDSP6 is the brand for a family of 32-bit multi-threaded microarchitectures implementing the same instruction set for a digital signal processor DSP developed by Qualcomm According to 2012 estimation, Qualcomm shipped 12 billion DSP cores inside its system on a chip SoCs average 23 DSP core per SoC in 2011 year, and 15 billion cores were planned for 2012, making the QDSP6 the most shipped architecture of DSP2 CEVA had around 1 billion of DSP cores shipped in 2011 with 90% of IP-licenseable DSP market3

The Hexagon architecture is designed to deliver performance with low power over a variety of applications It has features such as hardware assisted multithreading, privilege levels, Very Long Instruction Word VLIW, Single Instruction, Multiple Data SIMD,4 and instructions geared toward efficient signal processing The CPU is capable of in-order dispatching up to 4 instructions the packet to 4 Execution Units every clock56 Hardware multithreading is implemented as barrel temporal multithreading - threads are switched in round-robin fashion each cycle, so the 600 MHz physical core is presented as three logical 200 MHz cores before V578 Hexagon V5 switched to dynamic multithreading DMT with thread switch on L2 misses, interrupt waiting or on special instructions89

Contents

  • 1 Software support
    • 11 Operating systems
    • 12 Compilers
  • 2 Adoption of the SIP block
  • 3 Third party integration
  • 4 Versions
  • 5 Availability in Snapdragon products
  • 6 Code sample
  • 7 See also
  • 8 References
  • 9 External links

Software supportedit

Support for the Hexagon DSPs could be similar to "Texas Instruments' hardware", including some RTOS

Operating systemsedit

The port of Linux for Hexagon runs under a hypervisor layer "Hexagon Virtual Machine"10 and was merged with the 32 release of the kernel1112 The original hypervisor is closed-source, and in April 2013 a minimal open-source hypervisor implementation for QDSP6 V2 and V3, the "Hexagon MiniVM" was released by Qualcomm under a BSD-style license1314

Compilersedit

Support for Hexagon was added in 31 release of LLVM by Tony Linthicum15 There is also a non-FSF maintained branch of GCC and binutils16

Adoption of the SIP blockedit

Qualcomm Hexagon DSPs have been available in Qualcomm Snapdragon SoC since 20061718 In Snapdragon S4 MSM8960 and newer there are three QDSP cores, two in the Modem subsystem and one Hexagon core in the Multimedia subsystem Modem cores are programmed by Qualcomm only, and only Multimedia core is allowed to be programmed by user

They are also used in some femtocell processors of Qualcomm, including FSM983219

Third party integrationedit

In March 2016, it was announced that semiconductor company Conexant's AudioSmart audio processing software was being integrated into Qualcomm's Hexagon20

Versionsedit

There are six versions of QDSP6 architecture released: V1 2006, V2 2007–2008, V3 2009, V4 2010–2011, QDSP6 V5 2013, in Snapdragon 80021; and QDSP6 V6 2016, in Snapdragon 82018 V4 has 20 DMIPS per milliwatt, operating at 500 MHz1718 Clock speed of Hexagon varies in 400–2000 MHz for QDSP6 and in 256–350 MHz for previous generation of the architecture, the QDSP522

Versions of QDSP6 Process node, nm Date8 Number of simultaneous threads Per-thread clock, MHz Total core clock, MHz
QDSP6 V1 658 Oct 2006
QDSP6 V223 65 Dec 20078 6 100 600
QDSP6 V3 1st gen23 45 2009 6 67 400
QDSP6 V3 2nd gen23 45 2009 4 100 400
QDSP6 V423 V4M, V4C, V4L8 28 2010–2011 39 167 500
QDSP6 V524 V5A, V5H8 28 2013 38 200 or greater with DMT9 600
QDSP6 V625 14 2016 4 500 2000

Availability in Snapdragon productsedit

Both Hexagon QDSP6 and pre-Hexagon QDSP5 cores are used in modern Qualcomm SoCs, QDSP5 mostly in low-end products Modem QDSPs often pre-Hexagon are not shown in the table

QDSP5 usage:

Snapdragon generation Chipset SoC ID DSP Generation DSP Frequency, MHz Process node, nm
S122 MSM7627, MSM7227, MSM7625, MSM7225 QDSP5 320 65
S122 MSM7627A, MSM7227A, MSM7625A, MSM7225A QDSP5 350 45
S222 MSM8655, MSM8255, APQ8055, MSM7630, MSM7230 QDSP5 256 45
S4 Play22 MSM8625, MSM8225 QDSP5 350 45
S20026 8110, 8210, 8610, 8112, 8212, 8612, 8225Q, 8625Q QDSP5 384 45 LP

QDSP6 Hexagon usage:

Snapdragon generation Chipset SoC ID QDSP6 version DSP Frequency, MHz Process node, nm
S122 QSD8650, QSD8250 QDSP6 600 65
S322 MSM8660, MSM8260, APQ8060 QDSP6 V3 400 45
S4 Prime22 MPQ8064 QDSP6 V3 500 28
S4 Pro22 MSM8960 Pro, APQ8064 QDSP6 V3 500 28
S4 Plus22 MSM8960, MSM8660A, MSM8260A, APQ8060A, MSM8930,
MSM8630, MSM8230, APQ8030, MSM8627, MSM8227
QDSP6 V3 500 28
S40026 8926, 8930, 8230, 8630, 8930AB, 8230AB, 8630AB, 8030AB, 8226, 8626 QDSP6V4 500 28 LP
S60026 8064T, 8064M QDSP6V4 500 28 LP
S80026 8974, 8274, 8674, 8074 QDSP6V5A 600 28 HPm
S82025 8996 QDSP6V6 2000 14 FinFet LPP

Code sampleedit

This is a single instruction packet from the inner loop of a FFT:69

:endloop0

This packet is claimed by Qualcomm to be equal to 29 classic RISC operations; it includes vector add 4x 16-bit, complex multiply operation and hardware loop support All instructions of the packet are done in the same cycle

See alsoedit

  • Texas Instruments TMS320
  • CEVA, Inc
  • SHARC

Referencesedit

  1. ^ Baseband exploitation in 2013: Hexagon challenges Archived December 24, 2013, at the Wayback Machine /Ralf-Philipp Weinmann Pacsec 20132013-11-14, Tokyo, Japan: "32-bit unified address space for code and data – Byte addressable; 32 General registers 32-bit – also usable pairwise: 64-bit register pairs"
  2. ^ Will Strauss, Forward Concepts Wireless/DSP Market Bulletin: Qualcomm Leads in Global DSP Silicon Shipments Archived May 28, 2013, at the Wayback Machine // Forward Concepts: "In calendar year 2011, Qualcomm shipped a reported 521 million MSM chip shipments and we estimate that an average of 23 of its DSP cores in each unit resulted in 12 billion DSPs shipped in silicon This calendar year, we estimate that the company will ship an average of 24 DSP cores with each more complex MSM chip"
  3. ^ 1; 2; Ceva grabs 90% of DSP IP marketpermanent dead link, 2012
  4. ^ Hexagon v2 Programmers Reference
  5. ^ "Rob Landley's Blog Thing for 2012" Landleynet Retrieved 2012-10-19 
  6. ^ a b Porting LLVM to a Next Generation DSP, L Taylor Simpson Qualcomm // LLVM Developers’ Meeting: 11/18/2011
  7. ^ Faster 128-EEA3 and 128-EIA3 Software, Roberto Avanzi and Billy Bob Brumley Qualcomm Research, Cryptology ePrint Archive: Report 2013/428, 2 Jul 2013 Page 9
  8. ^ a b c d e f g h Qualcomm Hexagon DSP: An architecture optimized for mobile multimedia and communications // Lucian Codrescu Qualcomm, Hot Chips 25, Palo Alto, CA, August 2013
  9. ^ a b c d Qualcomm Extends Hexagon DSP: Hexagon v5 Adds Floating-Point Math, Dynamic Multithreading // Linley Gwennap, Microprocessor Report, August 2013
  10. ^ https://developerqualcommcom/download/80-nb419-3ahexagonvirtualmachinespecpdfpermanent dead link restricted access
  11. ^ "32 merge window, part 1" lwnnet Retrieved 2012-10-19 
  12. ^ Linux Kernel 32 Release Notes "14 New architecture: Hexagon"
  13. ^ Richard Kuo, Hexagon MiniVM // linuxportshexagon, 25 Apr 2013
  14. ^ Hexagon MiniVM // CodeAurora Qualcomm
  15. ^ "LLVM 31 Release Notes" Llvmorg 2012-05-15 Retrieved 2012-10-19 
  16. ^ "Hexagon Project Wiki" Codeauroraorg  " "Hexagon download" 
  17. ^ a b Qualcomm Announces Its 2012 Superchip: 28nm Snapdragon S4, 10/12/2011 by John Oram Quote: "Hexagon DSPs have been in Snapdragon chips since 2006"
  18. ^ a b c QDSP6 V4: Qualcomm Gives Customers and Developers Programming Access to its DSP Core // InsideDSP, June 22, 2012
  19. ^ Qualcomm Aims Hexagon at Femtocells, October 31, 2011 Linley Gwennap// Linley WIRE
  20. ^ "Qualcomm to Integrate Conexant AudioSmart into Hexagon DSPs" Speech Tech Magazine 2016-03-01 Retrieved 2016-03-11 
  21. ^ Qualcomm Announces Next Generation Snapdragon Premium Mobile Processors // Qualcomm, January 07, 2013
  22. ^ a b c d e f g h i j "List of Snapdragon SoCs" PDF Developerqualcommcom Retrieved 2012-10-19 
  23. ^ a b c d QDSP6 V4: BDTI Benchmark Results and Implementation Details Of Qualcomm's DSP Core // BDTI, February 12, 2013
  24. ^ Qualcomm's QDSP6 v5: Benchmarking Results Confirm That Floating-Point Support Has Arrived // BDTI, June 12, 2013
  25. ^ a b Qualcomm's QDSP6 v6: Imaging and Vision Enhancements Via Vector Extensions // BDTI, September 29, 2015
  26. ^ a b c d Snapdragon 800, 600, 400, 200 Processor Specs // Qualcomm

External linksedit

  • Qualcomm's Hexagon home page
  • Upcoming DSP architectures, Arnd Bergmann // LWN
  • Introduction to Qualcomm’s QDSP Access Program // Qualcomm, 2011
  • Qualcomm Hexagon DSP: An architecture optimized for mobile multimedia and communications // Lucian Codrescu Qualcomm, Hot Chips 25, Palo Alto, CA, August 2013
  • Qualcomm Extends Hexagon DSP: Hexagon v5 Adds Floating-Point Math, Dynamic Multithreading // Linley Gwennap, Microprocessor Report, August 2013


Qualcomm Hexagon Information about


Qualcomm Hexagon
Qualcomm Hexagon

Qualcomm Hexagon Information Video


Qualcomm Hexagon viewing the topic.
Qualcomm Hexagon what, Qualcomm Hexagon who, Qualcomm Hexagon explanation

There are excerpts from wikipedia on this article and video